# ==============================================================
# File generated on Sun Apr 21 17:44:31 -0400 2019
# Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC v2018.3 (64-bit)
# SW Build 2405991 on Thu Dec  6 23:38:27 MST 2018
# IP Build 2404404 on Fri Dec  7 01:43:56 MST 2018
# Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.
# ==============================================================

Family       : zynq
Device       : xc7z020
Package      : clg400
Speed Grade  : -1
Clock Period : 10.000 ns
